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Apr 19 2019

XC7K410T-L2FFG900E Datasheet PDF –FPGA Kintex-7 Family 406720 Cells 28nm Technology 1V 900-Pin FCBGA Tray

Product Overview

Product Category:

IC Chips

Kynix Part #:

KY32- XC7K410T-L2FFG900E

Manufacturer Part#:

XC7K410T-L2FFG900E

Manufacturer

Xilinx Inc.

Description:

IC FPGA 500 I/O 900FCBGA

Package:

BGA

Datasheet:

XC7K410T-L2FFG900E Datasheet

Stock:

Yes

Quantity:

88 PCS

XC7K410T-L2FFG900E Images are for reference only:

XC7K410T-L2FFG900E

Product Specifications

Product Category

IC Chips

Manufacturer

Xilinx Inc.

Status      

Active

Series

Kintex-7

Package-Case

900-BBGA, FCBGA

Combinatorial Delay of a CLB-Max

0.91 ns

Dedicated DSP

1540

Device Logic Units

254,200

Device Number of DLLs/PLLs

10

In System Programmability

Yes

JESD-30 Code

S-PBGA-B900

JESD-609 Code

e1

Mounting-Type

Surface Mount

Moisture Sensitivity Level

4

Maximum Number of User I/Os

350

Maximum Reflow Temperature

245 °C

Number-of-Gates

-

Number of I/O

500

Number of LABs-CLBs

31775

Number of Registers

508,400

Number of Multipliers

1540 (25x18)

Number of Inputs

500.0

Number of Logic-Elements-Cells

406720

Number of Outputs

500.0

Number of Terminals

900

Number of Reflow Cycle

3

Organization

31775 CLBS

Operating Temperature-Min

0.0 °C

Operating Temperature-Max

100.0 °C

PCB

900

Pin Pitch

1 mm

Pin Count

900

PCI Blocks

1

Power Supplies

0.9,1.8,3.3

Package Body Material

PLASTIC/EPOXY

Package Code

BGA

Package Description

Flip Chip Ball Grid Array

Package Equivalence Code

BGA900,30X30,40

Package Shape

SQUARE

Package Style

GRID ARRAY

Peak Reflow Temperature

NOT SPECIFIED

Process Technology

28 nm

Program Memory Type

SRAM

Programmability

Yes

Programmable Logic Type

FIELD PROGRAMMABLE GATE ARRAY

RAM Bits

29,306,880 Bit

Reflow Solder Time

30 Sec

Re-programmability   Support

1

Seated Height-Max

3.35 mm

Speed Grade

2L

Sub Category

Field Programmable Gate Arrays

Voltage-Supply

0.97 V ~ 1.03 V

Supply Voltage-Nom

0.9 V

Supply Voltage-Min

0.87 V

Supply Voltage-Max

0.93 V

Surface Mount

Yes

Screening Level

Extended

Technology

CMOS

Terminal Finish

Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

Terminal Form

BALL

Terminal Pitch

1.0 mm

Terminal Position

BOTTOM

Transceiver Blocks

16

Transceiver Speed

12.5 Gbps

Total RAM Bits

29306880

Total Number of Block RAM

795

Length

31.0 mm

Width

31.0 mm

REACH Compliant

Yes

RoHS Status

RoHS Compliant

Additional Feature

ALSO OPERATES AT 1 V SUPPLY

Lead Shape

Ball

Lead Free Status

Lead Free

Lead Finish(Plating)

SnAgCu

ECCN

3A991.D

HTSN

8542390001

SCHEDULE B

8542390000

 XC7K410T-L2FFG900E Datasheet PDF Download:

 XC7K410T-L2FFG900E Datasheet PDF

Kintex-7 FPGA Feature Summary by Device

Kintex-7 FPGA Feature Summary by DeviceKintex-7 FPGA Feature Summary by Device.png

Kintex-7 FPGA Device-Package Combinations and Maximum I/Os

Kintex-7 FPGA Device-Package Combinations and Maximum I,Os

Ordering Information

 Ordering Information

Description

Xilinx® 7 series FPGAs comprise four FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most demanding high-performance applications. The 7 series FPGAs include:

Spartan®-7 Family: Optimized for low cost, lowest power, and high I/O performance. Available in low-cost, very small form-factor packaging for smallest PCB footprint.

Artix®-7 Family: Optimized for low power applications requiring serial transceivers and high DSP and logic throughput. Provides the lowest total bill of materials cost for high-throughput, cost-sensitive applications.

Kintex®-7 Family: Optimized for best price-performance with a 2X improvement compared to previous generation, enabling a new class of FPGAs.

Virtex®-7 Family: Optimized for highest system performance and capacity with a 2X improvement in system performance. Highest capability devices enabled by stacked silicon interconnect (SSI) technology. 

Features

• Advanced high-performance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory.

36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering.

High-performance SelectIO™ technology with support for DDR3 interfaces up to 1,866 Mb/s.

High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to max. rates of 6.6 Gb/s up to 28.05 Gb/s, offering a special low-power mode, optimized for chip-to-chip interfaces.

A user configurable analog interface (XADC), incorporating dual 12-bit 1MSPS analog-to-digital converters with on-chip thermal and supply sensors.

DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric coefficient filtering.

Powerful clock management tiles (CMT), combining phase-locked loop (PLL) and mixed-mode clock manager (MMCM) blocks for high precision and low jitter.

Quickly deploy embedded processing with MicroBlaze™ processor.

Integrated block for PCI Express® (PCIe), for up to x8 Gen3 Endpoint and Root Port designs.

Wide variety of configuration options, including support for commodity memories, 256-bit AES encryption with HMAC/SHA-256 authentication, and built-in SEU detection and correction.

Low-cost, wire-bond, bare-die flip-chip, and high signal integrity flipchip packaging offering easy migration between family members in the same package. All packages available in Pb-free and selected packages in Pb option.

Designed for high performance and lowest power with 28 nm, HKMG, HPL process, 1.0V core voltage process technology and 0.9V core voltage option for even lower power.

Other data sheets within the file:

Datasheet

Kintex-7 FPGAs Datasheet

Kintex-7 FPGAs Datasheet

Kintex-7 FPGA CES Errata

Kintex-7 FPGA CES Errata

7 Series FPGA Overview

7 Series FPGA Overview

PCN Design/Specification

Zynq-7000 Datasheet Update 02/Jun/2014

Zynq-7000 Datasheet Update 02/Jun/2014

PCN Assembly/Origin

Additional Wafer Fabrication 16/Dec/2013

Additional Wafer Fabrication 16/Dec/2013

Substrate Supplier Addition 03/Nov/2014

Substrate Supplier Addition 03/Nov/2014


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