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Oct 19 2019

XC7K325T-2FFG900C Datasheet PDF – IC FPGA 500 I/O 900FCBGA XILINX

Product Overview

Product Category:

Embedded - FPGAs (Field Programmable Gate Array)

Kynix Part #:

KY32-XC7K325T-2FFG900C

Manufacturer Part#:

XC7K325T-2FFG900C

Manufacturer

XILINX

Description:

IC FPGA 500 I/O 900FCBGA

Package:

BGA

Datasheet:

XC7K325T-2FFG900C Datasheet

Stock:

Yes

Quantity:

1043 PCS


XC7K325T-2FFG900C Images are for reference only:

XC7K325T-2FFG900C


Product Specifications

Product Category

Embedded - FPGAs (Field Programmable Gate Array)

Manufacturer

XILINX

Status

Active

Series

Kintex®-7

Package-Case

900-BBGA, FCBGA

Audio I/O

NO

Clock Frequency-Max

1818.0 MHz

Configuration Memory

16MB QSPI; 128MB BPI FLASH

Combinatorial Delay of a CLB-Max

0.61 ns

Data Rate

6.6 Gb/s

Display Mode

HMDI Output

Distributed RAM

4000 kbit

Device Logic Cells

326080

Device Logic Units

203800

Ethernet

YES

EU RoHS Compliant

YES

Embedded Block RAM - EBR

16020 kbit

GPIO

YES

Interface Standards

FMC LPC; I2C; HPC; XADC; SMA; SFP+

JESD-30 Code

S-PBGA-B900

JESD-609 Code

e1

Mounting-Type

Surface Mount

Mounting Style

SMD/SMT

Moisture Sensitivity Level

4

Maximum Operating Frequency

640 MHz

Memory Size

1 GB

Memory Type

DDR3

Memory Card Interface

SD Card

Number of I/O

500

Number of LABs-CLBs

25475

Number of Registers

407600

Number of Inputs

500.0

Number of Logic-Elements-Cells

326080.0

Number of Outputs

500.0

Number of Transceivers

16

Number of Terminals

900

Organization

25475 CLBS

Operating Temperature-Min

0.0°C

Operating Temperature-Max

85.0°C

PCIe

PCIe

Pin Count

900

Product Type

FPGA - Field Programmable Gate Array

Power Supplies

1,1.8,3.3

Packaging

Tray

Package Body Material

PLASTIC/EPOXY

Package Code

BGA

Package Family Name

BGA

Package Equivalence Code

BGA900,30X30,40

Package Shape

SQUARE

Package Style

GRID ARRAY

Peak Reflow Temperature

NOT SPECIFIED

Programmable Logic Type

FIELD PROGRAMMABLE GATE ARRAY

RAM Bits

16,404,480 Bit

RAM Size

2 MB

REACH Compliant

YES

Re-programmability Support

1

Screening Level

Commercial

Seated Height-Max

3.35 mm

Speed Grade

2

Sub Category

Field Programmable Gate Arrays

Voltage-Supply

0.97 V ~ 1.03 V

Supply Voltage-Nom

1.0 V

Supply Voltage-Min

0.97 V

Supply Voltage-Max

1.03 V

Surface Mount

YES

Supplier Device Package

900-FCBGA (31x31)

Tradename

Kintex

Technology

CMOS

Total RAM Bits

16404480

Terminal Finish

Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

Terminal Form

BALL

Terminal Pitch

1.0 mm

Terminal Position

BOTTOM

Temperature Grade

OTHER

Time@Peak Reflow Temperature-Max

NOT SPECIFIED

USB

USB-Serial Bridge

Length

31.0 mm

Width

31.0 mm

ECCN

3A001.A.7.A

HTSN

8542390001

SCHEDULE B

8542390000


XC7K325T-2FFG900C Datasheet PDF Download:

XC7K325T-2FFG900C Datasheet PDF 

Ordering Information

Kintex-7 FPGA Ordering Information

Figure 1. Kintex-7 FPGA Ordering Information

Output Delay Measurements

Single-Ended Test Setup

Figure 2. Single-Ended Test Setup

 Differential Test Setup

Figure 3. Differential Test Setup

 


Description

Xilinx® 7 series FPGAs comprise four FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most demanding high-performance applications. The 7 series FPGAs include: 

• Spartan®-7 Family: Optimized for low cost, lowest power, and high I/O performance. Available in low-cost, very small form-factor packaging for smallest PCB footprint.

• Artix®-7 Family: Optimized for low power applications requiring serial transceivers and high DSP and logic throughput. Provides the lowest total bill of materials cost for high-throughput, cost-sensitive applications.

• Kintex®-7 Family: Optimized for best price-performance with a 2X improvement compared to previous generation, enabling a new class of FPGAs.

• Virtex®-7 Family: Optimized for highest system performance and capacity with a 2X improvement in system performance. Highest capability devices enabled by stacked silicon interconnect (SSI) technology.

Built on a state-of-the-art, high-performance, low-power (HPL), 28 nm, high-k metal gate (HKMG) process technology, 7 series FPGAs enable an unparalleled increase in system performance with 2.9 Tb/s of I/O bandwidth, 2 million logic cell capacity, and 5.3 TMAC/s DSP, while consuming 50% less power than previous generation devices to offer a fully programmable alternative to ASSPs and ASICs. 

Features

• Advanced high-performance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory.

• 36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering.

• High-performance SelectIO™ technology with support for DDR3 interfaces up to 1,866 Mb/s.

• High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to max. rates of 6.6 Gb/s up to 28.05 Gb/s, offering a special low-power mode, optimized for chip-to-chip interfaces.

• A user configurable analog interface (XADC), incorporating dual 12-bit 1MSPS analog-to-digital converters with on-chip thermal and supply sensors.

• DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric coefficient filtering.

• Powerful clock management tiles (CMT), combining phase-locked loop (PLL) and mixed-mode clock manager (MMCM) blocks for high precision and low jitter.

• Quickly deploy embedded processing with MicroBlaze™ processor.

• Integrated block for PCI Express® (PCIe), for up to x8 Gen3 Endpoint and Root Port designs.

• Wide variety of configuration options, including support for commodity memories, 256-bit AES encryption with HMAC/SHA-256 authentication, and built-in SEU detection and correction.

• Low-cost, wire-bond, bare-die flip-chip, and high signal integrity flipchip packaging offering easy migration between family members in the same package. All packages available in Pb-free and selected packages in Pb option.

• Designed for high performance and lowest power with 28 nm, HKMG, HPL process, 1.0V core voltage process technology and 0.9V core voltage option for even lower power.


Other data sheets within the file:

Datasheet

7 Series FPGA Overview

7 Series FPGA Overview

Kintex-7 FPGAs Datasheet

Kintex-7 FPGAs Datasheet

PCN Design/Specification

Zynq-7000 Datasheet Update 02/Jun/2014

Zynq-7000 Datasheet Update 02/Jun/2014

PCN Assembly/Origin

Substrate Supplier Addition 03/Nov/2014

Substrate Supplier Addition 03/Nov/2014


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