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Apr 15 2019

XC6VLX240T-2FF1156C Datasheet PDF – FPGA Virtex®-6 LXT Family 241152 Cells 40nm Technology 1V 1156-Pin FCBGA

Product Overview

Product Category:

IC Chips

Kynix Part #:

KY32-XC6VLX240T-2FF1156C

Manufacturer Part#:

XC6VLX240T-2FF1156C

Manufacturer

Xilinx Inc.

Description:

IC FPGA 600 I/O 1156FCBGA

Package:

1156-BBGA, FCBGA

Datasheet:

XC6VLX240T-2FF1156C Datasheet

Stock:

Yes

Quantity:

106 PCS

XC6VLX240T-2FF1156C Images are for reference only:

XC6VLX240T-2FF1156C

Product Specifications

Product Category

IC Chips

Manufacturer

Xilinx Inc.

Status      

Active

Series

Virtex®-6 LXT

Mounting Style

Surface Mount

Package-Case

1156-BBGA, FCBGA

RAM Size

14976 Kbit

REACH Compliant

Yes

ECCN

3A991.d

HTSUSA

8542390001

Clock Frequency-Max

1286.0 MHz

Combinatorial Delay of a CLB-Max

4.29 ns

JESD-30 Code

S-PBGA-B1156

JESD-609 Code

e0

Program Memory Type

SRAM

Programmable Logic Type

FIELD PROGRAMMABLE GATE ARRAY

Moisture Sensitivity Level

4

Number of Inputs

600.0

Number of Outputs

600.0

Number of Logic Cells

241152.0

Number-of-Gates

-

Number of Terminals

1156

Number-of-LABs-CLBs

18840

Number-of-Logic-Elements-Cells

241152

Number of Multipliers

768 (25x18)

Number of I/O

600

Operating Temperature-Min

0.0°C

Operating Temperature-Max

85.0 °C

Pin Count

1156

PCB

1156

Package Body Material

PLASTIC/EPOXY

Package Code

BGA

Package Equivalence Code

BGA1156,34X34,40

Package Shape

SQUARE

Package Style

GRID ARRAY

Peak Reflow Temperature

NOT SPECIFIED

Power Supplies

1,1.2/2.5

Programmability

Yes

Seated Height-Max

3.5 mm

Sub Category

Field Programmable Gate Arrays

Supply Voltage-Nom

1.0 V

Supply Voltage-Min

0.95 V

Supply Voltage-Max

1.05 V

Surface Mount

Yes

Technology

CMOS

Total-RAM-Bits

15335424

Temperature   Grade

OTHER

Terminal Finish

Tin/Lead (Sn63Pb37)

Terminal Form

BALL

Terminal Pitch

1.0 mm

Terminal Position

BOTTOM

Transceiver Blocks

24

Transceiver Speed

6.6Gbps

Length

35.0 mm

Width

35.0 mm

Lead Shape

Ball

Lead Free Status

Lead Free

EU RoHS

No

Ethernet MACs

4

PCI Blocks

2

Speed Grade

2

Reflow Solder Time

10 to 30 Sec

Number of Reflow Cycle

3

Lead Finish (Plating)

SnPb

XC6VLX240T-2FF1156C Datasheet PDF Download:

XC6VLX240T-2FF1156C Datasheet

Virtex-6 FPGA Ordering Information

Table 1 shows the speed and temperature grades available in the different Virtex-6 devices. Some devices might not be available in every speed and temperature grade.

Virtex-6 FPGAs Speed Grade and Temperature Ranges

Table 1. Virtex-6 FPGAs Speed Grade and Temperature Ranges


The Virtex-6 FPGA ordering information shown in Figure 1 applies to all packages including Pb-Free.

XC6VLX240T-2FF1156C Ordering Information

Fig 1. Virtex-6 FPGA Ordering Information

Device-Package Combinations and Maximum I/Os

XC6VLX240T-2FF1156C device-package combinations and maximum I,Os

Table2. Virtex-6 FPGAs Speed Grade and Temperature Ranges

Description

Virtex®-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on innovation as soon as their development cycle begins. Using the third-generation ASMBL™ (Advanced Silicon Modular Block) column-based architecture, the Virtex-6 family contains multiple distinct sub-families. This overview covers the devices in the LXT, SXT, and HXT sub-families. Each sub-family contains a different ratio of features to most efficiently address the needs of a wide variety of advanced logic designs. In addition to the high-performance logic fabric, Virtex-6 FPGAs contain many builtin system-level blocks. These features allow logic designers to build the highest levels of performance and functionality into their FPGAbased systems. Built on a 40 nm state-of-the-art copper process technology, Virtex-6 FPGAs are a programmable alternative to custom ASIC technology. Virtex-6 FPGAs offer the best solution for addressing the needs of high-performance logic designers, high-performance DSP designers, and high-performance embedded systems designers with unprecedented logic, DSP, connectivity, and soft microprocessor capabilities.

Features

 Three sub-families:

— Virtex-6 LXT FPGAs: High-performance logic with advanced serial connectivity

— Virtex-6 SXT FPGAs: Highest signal processing capability with advanced serial connectivity

— Virtex-6 HXT FPGAs: Highest bandwidth serial connectivity

 Compatibility across sub-families

— LXT and SXT devices are footprint compatible in the same package

Advanced, high-performance FPGA Logic

— Real 6-input look-up table (LUT) technology

— Dual LUT5 (5-input LUT) option

— LUT/dual flip-flop pair for applications requiring rich register mix

— Improved routing efficiency

— 64-bit (or two 32-bit) distributed LUT RAM option per 6-input LUT

— SRL32/dual SRL16 with registered outputs option

Powerful mixed-mode clock managers (MMCM)

— MMCM blocks provide zero-delay buffering, frequency synthesis, clock-phase shifting, inputjitter filtering, and phase-matched clock division

36-Kb block RAM/FIFOs

— Dual-port RAM blocks

— Programmable - Dual-port widths up to 36 bits - Simple dual-port widths up to 72 bits

— Enhanced programmable FIFO logic

— Built-in optional error-correction circuitry

— Optionally use each block as two independent 18 Kb blocks

High-performance parallel SelectIO™ technology

— 1.2 to 2.5V I/O operation

— Source-synchronous interfacing using ChipSync™ technology

— Digitally controlled impedance (DCI) active termination

— Flexible fine-grained I/O banking

— High-speed memory interface support with integrated write-leveling capability

Advanced DSP48E1 slices

— 25 x 18, two's complement multiplier/accumulator

— Optional pipelining

— New optional pre-adder to assist filtering applications

— Optional bitwise logic functionality

— Dedicated cascade connections

Flexible configuration options

— SPI and Parallel Flash interface

— Multi-bitstream support with dedicated fallback reconfiguration logic

— Automatic bus width detection

 System Monitor capability on all devices

— On-chip/off-chip thermal and supply voltage monitoring

— JTAG access to all monitored quantities

Integrated interface blocks for PCI Express® designs

— Compliant to the PCI Express Base Specification 2.0

— Gen1 (2.5 Gb/s) and Gen2 (5 Gb/s) support with GTX transceivers

— Endpoint and Root Port capable

— x1, x2, x4, or x8 lane support per block

GTX transceivers: up to 6.6 Gb/s

— Data rates below 480 Mb/s supported by oversampling in FPGA logic.

GTH transceivers: 2.488 Gb/s to beyond 11 Gb/s

Integrated 10/100/1000 Mb/s Ethernet MAC block

— Supports 1000BASE-X PCS/PMA and SGMII using GTX transceivers

— Supports MII, GMII, and RGMII using SelectIO technology resources

— 2500Mb/s support available

40 nm copper CMOS process technology

1.0V core voltage (-1, -2, -3 speed grades only)

Lower-power 0.9V core voltage option (-1L speed grade only)

High signal-integrity flip-chip packaging available in standard or Pb-free package options

Other data sheets within the file:

Datasheet

Virtex-6 FPGA Datasheet

XC6VLX240T-2FF1156C

Virtex-6 FPGA Family Overview

XC6VLX240T-2FF1156C

PCN Design/Specification

Virtex-6 FIFO Input Logic Reset   18/Apr/2011

XC6VLX240T-2FF1156C

PCN Assembly/Origin

Substrate Supplier Addition 03/Nov/2014

XC6VLX240T-2FF1156C


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