Product Overview
Product Category: | Embedded - FPGAs (Field Programmable Gate Array) |
Kynix Part #: | KY32-XC6SLX150T-3FG900C |
Manufacturer Part#: | XC6SLX150T-3FG900C |
Manufacturer | Xilinx Inc. |
Description: | IC FPGA 540 I/O 900FBGA |
Package: | 900-BBGA |
Datasheet: | |
Stock: | Yes |
Quantity: | 600 PCS |
XC6SLX150T-3FG900C Images are for reference only:
Product Specifications
Product Category | Embedded - FPGAs (Field Programmable Gate Array) |
Manufacturer | Xilinx Inc. |
Status | Active |
Series | Spartan®-6 LXT |
Clock Frequency-Max | 862.0 MHz |
Combinatorial Delay of a CLB-Max | 0.21 ns |
Data Rate | 800 Mb/s |
Distributed RAM | 1355 kbit |
Device Logic Cells | 147443 |
Device Logic Units | 147443 |
Embedded Block RAM - EBR | 4824 kbit |
In System Programmability | No |
JESD-30 Code | S-PBGA-B900 |
JESD-609 Code | e0 |
Lead Finish | Tin/Lead |
Mounting-Style | SMD/SMT |
Mounting-Type | Surface Mount |
Moisture Sensitivity Level | 3 |
Maximum Operating Frequency | 1080 MHz |
Number of I/Os | 540 |
Number of Pins | 900 |
Number of CLBs | 11519.0 |
Number of Inputs | 530.0 |
Number of Registers | 184304 |
Number of Logic Cells | 147443.0 |
Number of Outputs | 530.0 |
Number of Terminals | 900 |
Number of LABs/CLBs | 11519 |
Number of Transceivers | 8 |
Number of Logic Elements/Cells | 147443 |
Organization | 11519 CLBS |
Operating Temperature-Min | 0.0°C |
Operating Temperature-Max | 85.0°C |
Pin Count | 900 |
Package / Case | 900-BBGA |
Package Body Material | PLASTIC/EPOXY |
Package Code | BGA |
Package Equivalence Code | BGA900,30X30,40 |
Package Shape | SQUARE |
Package Style | GRID ARRAY |
Peak Reflow Temperature | 225°C |
Power Supplies | 1.2,2.5/3.3 |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
Product Type | FPGA - Field Programmable Gate Array |
RAM Bits | 4,939,776 Bit |
RAM Size | 603 kB |
REACH Compliant | Yes |
Re-programmability Support | 1 |
Seated Height-Max | 2.6 mm |
Speed Grade | 3 |
Sub Category | Field Programmable Gate Arrays |
Screening Level | Commercial |
Supply Voltage-Nom | 1.2 V |
Supply Voltage-Min | 1.14 V |
Supply Voltage-Max | 1.26 V |
Surface Mount | Yes |
Supplier Device Package | 900-FBGA (31x31) |
Tradename | Spartan |
Technology | CMOS |
Total RAM Bits | 4939776 |
Terminal Finish | Tin/Lead (Sn63Pb37) |
Terminal Form | BALL |
Terminal Pitch | 1.0 mm |
Terminal Position | BOTTOM |
Temperature Grade | OTHER |
Time@Peak Reflow Temperature-Max | 30 s |
Length | 31.0 mm |
Width | 31.0 mm |
Voltage-Supply | 1.14 V ~ 1.26 V |
RoHS Compliant | Yes |
Lead Free Status | Lead Free |
XC6SLX150T-3FG900C Datasheet PDF Download:
Ordering Information
Figure 1. Spartan-6 FPGA Ordering Information
Peak-to-Peak Voltage
Figure 2. Single-Ended Peak-to-Peak Voltage
Figure 3. Differential Peak-to-Peak Voltage
Description
The Spartan®-6 family provides leading system integration capabilities with the lowest total cost for high-volume applications. The thirteen-member family delivers expanded densities ranging from 3,840 to 147,443 logic cells, with half the power consumption of previous Spartan families, and faster, more comprehensive connectivity. Built on a mature 45 nm low-power copper process technology that delivers the optimal balance of cost, power, and performance, the Spartan-6 family offers a new, more efficient, dual-register 6-input lookup table (LUT) logic and a rich selection of built-in system-level blocks. These include 18 Kb (2 x 9 Kb) block RAMs, second generation DSP48A1 slices, SDRAM memory controllers, enhanced mixed-mode clock management blocks, SelectIO™ technology, poweroptimized high-speed serial transceiver blocks, PCI Express® compatible Endpoint blocks, advanced system-level power management modes, auto-detect configuration options, and enhanced IP security with AES and Device DNA protection. These features provide a lowcost programmable alternative to custom ASIC products with unprecedented ease of use. Spartan-6 FPGAs offer the best solution for high-volume logic designs, consumer-oriented DSP designs, and cost-sensitive embedded applications. Spartan-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components that enable designers to focus on innovation as soon as their development cycle begins.
Features
• Spartan-6 Family:
• Spartan-6 LX FPGA: Logic optimized
• Spartan-6 LXT FPGA: High-speed serial connectivity
• Designed for low cost
• Multiple efficient integrated blocks
• Optimized selection of I/O standards
• Staggered pads
• High-volume plastic wire-bonded packages
• Low static and dynamic power
• 45 nm process optimized for cost and low power
• Hibernate power-down mode for zero power
• Suspend mode maintains state and configuration with multi-pin wake-up, control enhancement
• Lower-power 1.0V core voltage (LX FPGAs, -1L only)
• High performance 1.2V core voltage (LX and LXT FPGAs, -2, -3, and -3N speed grades)
• Multi-voltage, multi-standard SelectIO™ interface banks
• Up to 1,080 Mb/s data transfer rate per differential I/O
• Selectable output drive, up to 24 mA per pin
• 3.3V to 1.2V I/O standards and protocols
• Low-cost HSTL and SSTL memory interfaces
• Hot swap compliance
• Adjustable I/O slew rates to improve signal integrity
• High-speed GTP serial transceivers in the LXT FPGAs
• Up to 3.2 Gb/s
• High-speed interfaces including: Serial ATA, Aurora, 1G Ethernet, PCI Express, OBSAI, CPRI, EPON, GPON, DisplayPort, and XAUI
• Integrated Endpoint block for PCI Express designs (LXT)
• Low-cost PCI® technology support compatible with the 33 MHz, 32- and 64-bit specification.
• Efficient DSP48A1 slices
• High-performance arithmetic and signal processing
• Fast 18 x 18 multiplier and 48-bit accumulator
• Pipelining and cascading capability
• Pre-adder to assist filter applications
• Integrated Memory Controller blocks
• DDR, DDR2, DDR3, and LPDDR support
• Data rates up to 800 Mb/s (12.8 Gb/s peak bandwidth)
• Multi-port bus structure with independent FIFO to reduce design timing issues
• Abundant logic resources with increased logic capacity
• Optional shift register or distributed RAM support
• Efficient 6-input LUTs improve performance and minimize power
• LUT with dual flip-flops for pipeline centric applications
• Block RAM with a wide range of granularity
• Fast block RAM with byte write enable
• 18 Kb blocks that can be optionally programmed as two independent 9 Kb block RAMs
• Clock Management Tile (CMT) for enhanced performance
• Low noise, flexible clocking
• Digital Clock Managers (DCMs) eliminate clock skew and duty cycle distortion
• Phase-Locked Loops (PLLs) for low-jitter clocking
• Frequency synthesis with simultaneous multiplication, division, and phase shifting
• Sixteen low-skew global clock networks
• Simplified configuration, supports low-cost standards
• 2-pin auto-detect configuration
• Broad third-party SPI (up to x4) and NOR flash support
• Feature rich Xilinx Platform Flash with JTAG
• MultiBoot support for remote upgrade with multiple bitstreams, using watchdog protection
• Enhanced security for design protection
• Unique Device DNA identifier for design authentication
• AES bitstream encryption in the larger devices
• Faster embedded processing with enhanced, low cost, MicroBlaze™ soft processor
• Industry-leading IP and reference designs
Other data sheets within the file:
Datasheet | |
XC6SLX150T-3FG900C Datasheet | ![]() |
Spartan-6 FPGA Datasheet | ![]() |