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Apr 19 2019

XC4VFX100-10FFG1152C Datasheet PDF – FPGA Virtex®-4 FX Family 94896 Cells 90nm (CMOS) Technology 1.2V 1152-Pin FC-BGA

Product Overview

Product Category:

Embedded - FPGAs (Field Programmable Gate   Array)

Kynix Part #:

KY32-XC4VFX100-10FFG1152C

Manufacturer Part#:

XC4VFX100-10FFG1152C

Manufacturer

Xilinx Inc.

Description:

IC FPGA 576 I/O 1152FCBGA

Package:

1152-BBGA, FCBGA

Datasheet:

XC4VFX100-10FFG1152C Datasheet

Stock:

Yes

Quantity:

120 PCS

XC4VFX100-10FFG1152C Images are for reference only:

XC4VFX100-10FFG1152C

 

Product Specifications

Product Category

Embedded - FPGAs (Field Programmable Gate Array)

Manufacturer

Xilinx Inc.

Status      

Active

Series

Virtex®-4 FX

Package-Case

1152-BBGA, FCBGA

Basic Package Type

Ball Grid Array

Clock Frequency-Max

1028.0 MHz

Dedicated DSP

160

Device Number of DLLs/PLLs

12

Ethernet MACs

4

Giga Multiply Accumulates per Second

80

Jedec

MS-034AAR-1

JESD-30 Code

S-PBGA-B1152

JESD-609 Code

e1

Mounting-Type

Surface Mount

Moisture Sensitivity Level

4

Maximum Reflow Temperature

245 °C

Number-of-Gates

-

Number of I/O

576

Number of LABs-CLBs

10544

Number of Multipliers

320 (18x18)

Number of Inputs

576.0

Number of Logic-Elements-Cells

94896

Number of Outputs

576.0

Number of Reflow Cycle

3

Number of Terminals

1152

Organization

10544 CLBS

Operating Temperature-Min

0.0 °C

Operating Temperature-Max

85.0 °C

Operating-Supply-Voltage

1.2 V

PCB

1152

Pin Pitch

1 mm

Pin Count

1152

Package Body Material

PLASTIC/EPOXY

Package Code

BGA

Package Description

Flip Chip Ball Grid Array

Package Family Name

BGA

Package Equivalence Code

BGA1152,34X34,40

Package Shape

SQUARE

Package Style

GRID ARRAY

Package Length

35 mm

Package Width

35 mm

Package Height

2.8 mm

Peak Reflow Temperature

245 °C

Program Memory Type

SRAM

Programmable Logic Type

FIELD PROGRAMMABLE GATE ARRAY

Processor Blocks

2

Programmability

No

Process Technology

90 nm

RAM Bits

6768 Kbit

Reflow Solder Time

30 Sec

Standard

IPC-1752

Seated Height-Max

3.4 mm

Speed Grade

10

Sub Category

Field Programmable Gate Arrays

Voltage-Supply

1.14 V ~ 1.26 V

Supply Voltage-Nom

1.2 V

Supply Voltage-Min

1.14 V

Supply Voltage-Max

1.26 V

Surface Mount

Yes

Technology

CMOS

Terminal Finish

Tin/Silver/Copper   (Sn95.5Ag4.0Cu0.5)

Terminal Form

BALL

Terminal Pitch

1.0 mm

Terminal Position

BOTTOM

Terminal Base Material

CuNi

Total RAM Bits

6930432

Total Number of Block RAM

376

Temperature Grade

OTHER

Transceiver Blocks

20

Transceiver Speed

3.125 Gbps

Length

35.0 mm

Width

35.0 mm

REACH Compliant

Yes

RoHS Status

RoHS Compliant

Lead Shape

Ball

Lead Free Status

Lead Free

Lead Finish (Plating)

SnAgCu

ECCN

3A991.d

HTSUSA

8542390001

XC4VFX100-10FFG1152C Datasheet PDF Download:

 XC4VFX100-10FFG1152C Datasheet PDF

Virtex-4 Device and Package Combinations and Maximum Available I/Os

Virtex-4 Device and Package Combinations and Maximum Available I,Os

Ordering Information

 Ordering Information

Description

Combining Advanced Silicon Modular Block (ASMBL™) architecture with a wide variety of flexible features, the Virtex®-4 family from Xilinx greatly enhances programmable logic design capabilities, making it a powerful alternative to ASIC technology. Virtex-4 FPGAs comprise three platform families—LX, FX, and SX—offering multiple feature choices and combinations to address all complex applications. The wide array of Virtex-4 FPGA hard-IP core blocks includes the

PowerPC® processors (with a new APU interface), tri-mode Ethernet MACs, 622 Mb/s to 6.5 Gb/s serial transceivers, dedicated DSP slices, high-speed clock management circuitry, and source-synchronous interface blocks. The basic Virtex-4

FPGA building blocks are enhancements of those found in the popular Virtex, Virtex-E, Virtex-II, Virtex-II Pro, and Virtex-II Pro X product families, so previous-generation designs are upward compatible. Virtex-4 devices are produced on a state-of-the-art 90 nm copper process using 300 mm (12-inch) wafer technology.

Features

• Three Families — LX/SX/FX

- Virtex-4 LX: High-performance logic applications solution

- Virtex-4 SX: High-performance solution for digital signal processing (DSP) applications

- Virtex-4 FX: High-performance, full-featured solution for embedded platform applications

Xesium™ Clock Technology

- Digital clock manager (DCM) blocks

- Additional phase-matched clock dividers (PMCD)

- Differential global clocks

XtremeDSP™ Slice

- 18 x 18, two’s complement, signed Multiplier

- Optional pipeline stages

- Built-in Accumulator (48-bit) and Adder/Subtracter

Smart RAM Memory Hierarchy

- Distributed RAM

- Dual-port 18-Kbit RAM blocks

- Optional pipeline stages

- Optional programmable FIFO logic automatically remaps RAM signals as FIFO signals

- High-speed memory interface supports DDR and DDR-2 SDRAM, QDR-II, and RLDRAM-II.

SelectIO™ Technology

- 1.5V to 3.3V I/O operation

- uilt-in ChipSync™ source-synchronous technology

- Digitally controlled impedance (DCI) active termination

- ine grained I/O banking (configuration in one bank)

Flexible Logic Resources

Secure Chip AES Bitstream Encryption

90 nm Copper CMOS Process

1.2V Core Voltage

Flip-Chip Packaging including Pb-Free Package

Choices

RocketIO™ 622 Mb/s to 6.5 Gb/s Multi-Gigabit

Transceiver (MGT) [FX only]

IBM PowerPC RISC Processor Core [FX only]

- PowerPC 405 (PPC405) Core

- Auxiliary Processor Unit Interface (User Coprocessor)

Multiple Tri-Mode Ethernet MACs [FX only]

Other data sheets within the file:

Datasheet

Virtex-4 Family Overview

Virtex-4 Family Overview

Virtex-4   FPGA User Guide

Virtex-4   FPGA User Guide


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