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Dec 6 2019

TMSC6701GJC16719V Datasheet PDF – IC FLOATING-POINT DSP 352-BGA TI

Product Overview

Product Category:

Embedded - DSP (Digital Signal Processors)

Kynix Part #:

KY32-TMSC6701GJC16719V

Manufacturer Part#:

TMSC6701GJC16719V

Manufacturer

TI

Description:

IC FLOATING-POINT DSP 352-BGA

Package:

BGA

Datasheet:

TMSC6701GJC16719V Datasheet

Stock:

Yes

Quantity:

556 PCS


TMSC6701GJC16719V Images are for reference only:

TMSC6701GJC16719V


Product Specifications

Product Category

Embedded - DSP (Digital Signal Processors)

Manufacturer

TI

Status

Active

Series

TMS320C67x

Address Bus Width

22.0

Bit Size

32

Barrel Shifter

No

Boundary Scan

Yes

Clock Rate

167 MHz

Core Architecture

C67x

Clock Frequency-Max

166.67 MHz

Device Core

C67x

Data Bus Width

32 bit

Device Input Clock Speed

167 MHz

External Data Bus Width

32.0

Format

FLOATING POINT

Frequency

167 MHz

Family Name

TMS320

Interface

Host Interface, McBSP

Instruction Type

Floating Point

Internal Bus Architecture

MULTIPLE

Instruction Set Architecture

Advanced VLIW

JESD-30 Code

S-PBGA-B352

JESD-609 Code

e0

Lead Finish

Tin/Lead

Low Power Mode

Yes

Memory Size

64 kB

Mounting Type

Surface Mount

Mounting Style

SMD/SMT

Moisture Sensitivity Level

4

Maximum Clock Frequency

167 MHz

Non-Volatile Memory

External

Number of Bits

32

Number of Pins

352

Number of Terminals

352

Numeric and Arithmetic Format

Floating-Point

On-Chip RAM

128 kB

Operating Temperature-Min

0.0 °C

Operating Temperature-Max

90.0 °C

Product

DSPs

Product Type

DSP - Digital Signal Processors & Controllers

Pin Count

352

PCB changed

352

Power Supplies

1.8,3.3

Package Body Material

PLASTIC/EPOXY

Package Code

HBGA

Package / Case

352-BBGA, FCCSPBGA

Package Shape

SQUARE

Package Style

GRID ARRAY, HEAT SINK/SLUG

Package Equivalence Code

BGA352,26X26,50

Programmability

No

Program Memory Type

ROMLess

Peak Reflow Temperature (Cel)

220 °C

RAM Size

128 KB

RAM (words)

16384

Sub Category

Digital Signal Processors

Seated Height-Max

3.5 mm

Supplier Device Package

352-FC/CSP (35x35)

Supply Voltage-Nom

1.9 V

Supply Voltage-Min

1.81 V

Supply Voltage-Max

1.99 V

Surface Mount

Yes

Type

Floating Point

Technology

CMOS

Terminal Finish

Tin/Lead (Sn/Pb)

Terminal Form

BALL

Terminal Pitch

1.27 mm

Terminal Position

BOTTOM

Time@Peak Reflow Temperature-Max

NOT SPECIFIED

Unit Weight

0.492329 oz

Voltage - I/O

3.30 V

Voltage - Core

1.90 V

Length

35.0 mm

Width

35.0 mm


TMSC6701GJC16719V Datasheet PDF Download:

TMSC6701GJC16719V datasheet PDF 

Functional Block and CPU Diagram

Figure1. Functional Block and CPU Diagram 

Figure 1. Functional Block and CPU Diagram

Description

The TMS320C67x DSPs are the floating-point DSP family in the TMS320C6000 DSP platform. The TMS320C6701 (C6701) device is based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making this DSP an excellent choice for multichannel and multifunction applications. With performance of up to 1 giga floating-point operations per second (GFLOPS) at a clock rate of 167 MHz, the C6701 offers cost-effective solutions to high-performance DSP programming challenges. The C6701 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The C6701 can produce two multiply-accumulates (MACs) per cycle for a total of 334 million MACs per second (MMACS). The C6701 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

The C6701 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory consists of two 32K-byte blocks of RAM. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.

The C6701 has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows  debugger interface for visibility into source code execution.

Features

· Highest Performance Floating-Point Digital Signal Processor (DSP) TMS320C6701

− 8.3-, 6.7-, 6-ns Instruction Cycle Time

− 120-, 150-, 167-MHz Clock Rate

− Eight 32-Bit Instructions/Cycle

− 1 GFLOPS

− TMS320C6201 Fixed-Point DSP Pin-Compatible

· VelociTI Advanced Very Long Instruction Word (VLIW) C67x CPU Core

− Eight Highly Independent Functional Units:

− Four ALUs (Floating- and Fixed-Point)

− Two ALUs (Fixed-Point)

− Two Multipliers (Floating- and Fixed-Point)

− Load-Store Architecture With 32 32-Bit General-Purpose Registers

− Instruction Packing Reduces Code Size

− All Instructions Conditional

· Instruction Set Features

− Hardware Support for IEEE Single-Precision Instructions

− Hardware Support for IEEE Double-Precision Instructions

− Byte-Addressable (8-, 16-, 32-Bit Data)

− 8-Bit Overflow Protection

− Saturation

− Bit-Field Extract, Set, Clear

− Bit-Counting

− Normalization

· 1M-Bit On-Chip SRAM

− 512K-Bit Internal Program/Cache (16K 32-Bit Instructions)

− 512K-Bit Dual-Access Internal Data (64K Bytes)

· 32-Bit External Memory Interface (EMIF)

− Glueless Interface to Synchronous Memories: SDRAM and SBSRAM

− Glueless Interface to Asynchronous Memories: SRAM and EPROM

− 52M-Byte Addressable External Memory Space

· Four-Channel Bootloading Direct-Memory-Access (DMA) Controlle With an Auxiliary Channel

· 16-Bit Host-Port Interface (HPI)

− Access to Entire Memory Map

· Two Multichannel Buffered Serial Ports (McBSPs)

− Direct Interface to T1/E1, MVIP, SCSA Framers

− ST-Bus-Switching Compatible

− Up to 256 Channels Each

− AC97-Compatible

− Serial-Peripheral-Interface (SPI) Compatible (Motorola)

· Two 32-Bit General-Purpose Timers

· Flexible Phase-Locked-Loop (PLL) Clock Generator

· IEEE-1149.1 (JTAG†) Boundary-Scan-Compatible

· 352-Pin Ball Grid Array (BGA) Package (GJC Suffix)

· 0.18-µm/5-Level Metal Process

− CMOS Technology

· 3.3-V I/Os, 1.8-V Internal (120-, 150-MHz)

· 3.3-V I/Os, 1.9-V Internal (167-MHz Only)


Other data sheets within the file:

Datasheet


TMSC6701GJC16719V Datasheet

TMSC6701GJC16719V Datasheet


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