SPC5602BF1MLQ6 Datasheet PDF - 32-bit Microcontrollers MCU SPC5602B

Product Overview

SPC5602BF1MLQ6 Images are for reference only:

Product Specifications

SPC5602BF1MLQ6 Datasheet PDF Download:

Package pinouts

Fig. 1 MPC560xB LQFP 64-pin configuration

Fig. 2 MPC560xC LQFP 64-pin configuration

Fig. 3 LQFP 100-pin configuration

Fig. 4 LQFP 144-pin configuration

Block diagram

Fig. 5 block diagram of the MPC5604B C device series

Description

The MPC5604B/C is a family of next generation microcontrollers built on the Power Architecture® embedded category.

The MPC5604B/C family of 32-bit microcontrollers is the latest achievement in integrated automotive application controllers. It belongs to an expanding family of automotive-focused products designed to address the next wave of body electronics applications within the vehicle. The advanced and cost-efficient host processor core of this automotive controller family complies with the Power Architecture embedded category and only implements the VLE (variable-length encoding) APU, providing improved code density. It operates at speeds of up to 64 MHz and offers high performance processing optimized for low power consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and is supported with software drivers, operating systems and configuration code to assist with users implementations.

Features

• Single issue, 32-bit CPU core complex (e200z0)

– Compliant with the Power Architecture® embedde category

– Includes an instruction set enhancement allowing variable length encoding (VLE) for code size footprint reduction. With the optional encoding of mixed 16-bit and 32-bit instructions, it is possible to achieve significant code size footprint reduction.

• Up to 512 KB on-chip code flash supported with the flash controller and ECC

• 64 (4×16) KB on-chip data flash memory with ECC

• Up to 48 KB on-chip SRAM with ECC

• Memory protection unit (MPU) with 8 region descriptors and 32-byte region granularity

• Interrupt controller (INTC) with 148 interrupt vectors, including 16 external interrupt sources and 18 external interrupt/wakeup sources

• Frequency modulated phase-locked loop (FMPLL)

• Crossbar switch architecture for concurrent access toperipherals, flash memory, or RAM from multiple bus masters

• Boot assist module (BAM) supports internal flash programming via a serial link (CAN or SCI)

• Timer supports input/output channels providing a range of 16-bit input capture, output compare, and pulse width modulation functions (eMIOS-lite)

• 10-bit analog-to-digital converter (ADC)

• 3 serial peripheral interface (DSPI) modules

• Up to 4 serial communication interface (LINFlex) modules