Product Overview
Product Category: | IC Chips |
Kynix Part #: | KY32-MPC8572EVTARLD |
Manufacturer Part#: | MPC8572EVTARLD |
Manufacturer | NXP USA Inc. |
Description: | IC MPU MPC85XX 1.067GHZ 1023BGA |
Package: | 1023-BFBGA, FCBGA |
Datasheet: | |
Stock: | Yes |
Quantity: | 70 PCS |
MPC8572EVTARLD Images are for reference only:
Product Specifications
Categories | Integrated Circuits (ICs) Embedded - Microcontrollers |
Series | MPC85xx |
Status | Obsolete |
Package Description | 33 X 33 MM, LEAD FREE, PLASTIC, FCBGA-1023 |
EU RoHS Compliant | Yes |
REACH Compliant | Yes |
Address Bus Width | 32 |
Brand | NXP / Freescale |
Base Part Number | MPC8572 |
Boundary Scan | Yes |
Core Processor | PowerPC e500 |
Clock Frequency-Max | 133 MHz |
Co-Processors/DSP | Signal Processing; SPE, Security; SEC |
Data Bus Width | 32 bit |
Ethernet | 10/100/1000Mbps (4) |
External Data Bus Width | 32 |
Format | FLOATING POINT |
Graphics Acceleration | No |
I/O Voltage | 1.5, 1.8, 2.5, 3.3V |
Integrated Cache | Yes |
JESD-30 Code | S-PBGA-B1023 |
JESD-609 Code | e2 |
Low Power Mode | Yes |
Moisture Sensitive | Yes |
Mounting Style | SMD/SMT |
Max I/O Voltage | 3.3 V |
Number of Bits | 32-Bit |
Number of Cores | 2 |
Number of Pins | 1023 |
Length | 33 mm |
Width | 33 mm |
Operating Temperature | 0°C ~ 105°C (TA) |
Operating Supply Voltage | 1.1 V |
Packaging | Tray |
Package / Case | 1023-BFBGA, FCBGA |
Supplier Device Package | 1023-FCPBGA (33x33) |
Package Body Material | PLASTIC/EPOXY |
Package Code | HBGA |
Package Equivalence Code | BGA1023,32X32,40 |
Package Shape | SQUARE |
Package Style | GRID ARRAY |
Peak Reflow Temperature (Cel) | 245 |
Power Supplies | 1.1,1.8/3.3 V |
Qualification Status | Not Qualified |
RAM Size | 1 MB |
RAM Controllers | DDR2, DDR3 |
Radiation Hardening | No |
RoHS | Compliant |
Speed | 1.067 GHz |
Seated Height-Max | 3.38 mm |
Security Features | Cryptography, Random Number Generator |
Supply Voltage-Max | 1.155 V |
Supply Voltage-Min | 1.1 V |
Supply Voltage-Nom | 1.045 V |
Subcategory | Microprocessors |
Technology | CMOS |
Temperature Grade | OTHER |
Terminal Finish | Tin/Silver (Sn/Ag) |
Terminal Form | BALL |
Terminal Pitch | 1 mm |
Terminal Position | BOTTOM |
Time@Peak Reflow Temperature-Max (s) | 30 |
Lead Free Status / RoHS Status | Lead free / ROHS3 Compliant |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Additional Interfaces | DUART, HSSI, I²C, RapidIO |
MPC8572EVTARLD Datasheet PDF Download:
Block Diagram
Fig. 1 MPC8572E Block Diagram
Description
Next-generation PowerQUICC® III integrated communications processors are designed to provide solutions for symmetrical and asymmetrical multi-core systems. Based on the scalable e500 processor and system-on-chip (SoC) platform, they deliver dual-core gigahertz plus processing performance with advanced content processing and security features.
The MPC8572E family of processors offers clock speeds from 1.2 GHz up to 1.5 GHz, combining two powerful e500 processor cores built on Power Architecture® technology, enhanced peripherals and high-speed interconnect technology to balance processor performance with I/O system throughput. These processors also contain application acceleration blocks such as a table lookup unit (TLU) that offloads complex table searches and header inspections, a pattern-matching engine to handle regular expression matching with a deflate engine to manage file decompression and a security engine that accelerates crypto operations in IPsec and SSL/TLS for VPNs.
Based on NXP®.s 90 nm silicon-on-insulator (SOI) copper interconnect process technology, the MPC8572E is designed to deliver higher performance with lower power dissipation. The MPC8572E processors provide a significant performance increase and represent continuous innovation from the popular PowerQUICC family. With uncompromising integration, the MPC8572E platform builds on the embedded core performance of Power Architecture technology and adds new features to enhance traffic management and security acceleration.
Support for high-speed interfaces on the MPC8572E enables scalable connectivity to network processors and/or ASICs in the data plane while the MPC8572E platform handles complex, computationally demanding control plane processing tasks. These processors include dual memory controllers supporting DDR2 and DDR3 for future proofing and error correction codes for high reliability, enhanced Gigabit Ethernet (GbE) support and double precision floating point.
Features
Dual e500 Power Architecture cores scaling to 1.5 GHz
1 MB L2 cache/SRAM with I/O stashing
32 KB I/D L1 cache per core
Dual integrated DDR2/DDR3 SDRAM memory controllers
64-bits (72-bits with ECC) per controller
to 800 MHz datarate
Four integrated Ethernet controllers (enhanced TSEC)
10/100/1000 support
TCP/UPD offload
Quality of service support
IEEE® 1588 support
Lossless flow control
SGMII interfaces
Single 10/100 fast Ethernet controller (FEC) with MII (muxed)
TLU offloading complex table searches
Pattern matching engine searches for regular expressions within packet payloads
Includes packet deflate engine to expose zipped payloads
Security engine
DES, 3DES, MD-5, SHA-1/2, AES, RSA, RNG, Kasumi F8/F9 and ARC-4 encryption algorithms
PCI Express®
Serial RapidIO®
32-bit local bus running up to 133 MHz
Dual I²C, Dual DMA, DUART, multiprocessor interrupt controller, IEEE1149.1 JTAG test access port
1023-pin FC-PBGA package
Other data sheets within the file:
Datasheets | |
MPC8572E Hardware Spec |  |
TBI Link Status Errata |  |
MPIC Double Interrupt Errata |  |
PCN Obsolescence/ EOL | |
MPC8572 Devices 25/May/2012 |  |
Users Guide | |
MPC8572 Development System User’s Guide (REV 1) |  |
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