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Aug 28 2019

MC9S12C32MFAE25 Datasheet PDF – IC MCU 16BIT 32KB FLASH 48LQFP Freescale Semiconductor - NXP

Product Overview

Product Category:

Embedded - Microcontrollers

Kynix Part #:

KY32 - MC9S12C32MFAE25

Manufacturer Part#:

MC9S12C32MFAE25

Manufacturer

Freescale Semiconductor - NXP

Description:

IC MCU 16BIT 32KB FLASH 48LQFP

Package:

48-LQFP

Datasheet:

MC9S12C32MFAE25 Datasheet

Stock:

Yes

Quantity:

727 PCS


MC9S12C32MFAE25 Images are for reference only:

MC9S12C32MFAE25


Product Specifications

Product Category

Embedded - Microcontrollers

Manufacturer

Freescale Semiconductor - NXP

Series

HCS12

Status

Active

Packaging

Tray

Package/Case

48-LQFP

ADC Channels

8

ADC Resolution

10 bit

Address Bus Width

16.0

Analog Comparators

3

Bit Size

16

Core Size

16-Bit

Connectivity

CANbus, EBI/EMI, SCI, SPI

Core Processor

HCS12

Core Architecture

HCS12

Clock Frequency-Max

50.0 MHz

Density

256 kb

DAC Channels

No

DMA Channels

No

Data Bus Width

16 bit

Data Converters

A/D 8x10b

Device Core

HCS12

Ethernet

0

EEPROM Size

-

EU RoHS Compliant

Yes

External Data Bus Width

16.0

Frequency

25 MHz

Family Name

HCS12

Interface Type

CAN/SCI/SPI

Instruction Set Architecture

CISC

JESD-30 Code

S-PQFP-G48

JESD-609 Code

e3

Lead Shape

Gull-wing

Lead Finish

Matte Tin

Mounting Type

Surface Mount

Mounting Style

SMD/SMT

Maximum Clock Rate

25 MHz

Maximum CPU Frequency

25 MHz

Number of I/Os

31

Number of Pins

48

Number of ADCs

Single

Number of I/O Lines

31.0

Number of Terminals

48

Number of Timers

1

On-Chip ADC

8-chx10-bit

Oscillator Type

Internal

Operating Temperature-Min

-40.0 °C

Operating Temperature-Max

125.0 °C

On Chip Program ROM Width

8.0

PWM

6

Pin Count

48

Peripherals

POR, PWM, WDT

Package Code

LFQFP

Package Style

FLATPACK, LOW PROFILE, FINE PITCH

Package Shape

SQUARE

Package Height

1.45(Max)

Package Length

7

Package Width

7

Package Body Material

PLASTIC/EPOXY

PCB changed

48

PWM Channels

Yes

Peak Reflow Temperature

260 °C

Product Type

16-bit Microcontrollers - MCU

Parallel Master Port

No

Program Memory Size

32 kB

Program Memory Type

Flash

Programmability

Yes

RAM Size

2 kB

ROM (words)

32768

RAM (bytes)

2048.0

REACH Compliant

Yes

Real Time Clock

No

Speed

25.0 MHz

Seated Height-Max

1.6 mm

Supply Voltage-Nom

2.5 V

Supply Voltage-Min

2.35 V

Supply Voltage-Max

2.75 V

Surface Mount

Yes

Supplier Device Package

48-LQFP (7x7)

Technology

CMOS

Terminal Pitch

0.5 mm

Terminal Form

GULL WING

Terminal Finish

Matte Tin (Sn)

Terminal Position

QUAD

Temperature Grade

AUTOMOTIVE

Timers Channels

8

Timers Resolution

16 bit

Time@Peak Reflow Temperature-Max

40 s

SPI

1

I2S

0

I2C

0

CAN

1

USB

0

UART

0

USART

0

Unit Weight

0.006288 oz

Watchdog

1


MC9S12C32MFAE25 Datasheet PDF Download: 

MC9S12C32MFAE25 Datasheet PDF

Block Diagram

Figure 1. MC9S12C-Family,MC9S12GC-Family Block Diagram

Figure 1. MC9S12C-Family,MC9S12GC-Family Block Diagram

Device Pinouts

Figure 2. Pin Assignments in 48-Pin LQFP

Figure 2. Pin Assignments in 48-Pin LQFP


Description

The MC9S12C-Family / MC9S12GC-Family are 48/52/80 pin Flash-based MCU families, which deliver the power and flexibility of the 16-bit core to a whole new range of cost and space sensitive, general purpose industrial and automotive network applications. All MC9S12C-Family / MC9S12GC-Family members feature standard on-chip peripherals including a 16-bit central processing unit (CPU12), up to 128K bytes of Flash EEPROM, up to 4K bytes of RAM, an asynchronous serial communications interface (SCI), a serial peripheral interface (SPI), an 8-channel 16-bit timer module (TIM), a 6-channel 8-bit pulse width modulator (PWM), an 8-channel, 10-bit analog-to-digital converter (ADC).

The MC9S12C128-Family members also feature a CAN 2.0 A, B software compatible module (MSCAN12).

All MC9S12C-Family / MC9S12GC-Family devices feature full 16-bit data paths throughout. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements. In addition to the I/O ports available in each module, up to 10 dedicated I/O port bits are available with wake-up capability from stop or wait mode. The devices are available in 48-, 52-, and 80-pin QFP packages, with the 80-pin version pin compatible to the HCS12 A, B, and D Family derivatives.

Features

• 6-bit HCS12 core:

— HCS12 CPU

– Upward compatible with M68HC11 instruction set

– Interrupt stacking and programmer’s model identical to M68HC11

– Instruction queue

– Enhanced indexed addressing

— MMC (memory map and interface)

— INT (interrupt control)

— BDM (background debug mode)

— DBG12 (enhanced debug12 module, including breakpoints and change-of-flow trace buffer)

— MEBI (multiplexed expansion bus interface) available only in 80-pin package version

• Wake-up interrupt inputs:

— Up to 12 port bits available for wake up interrupt function with digital filtering

• Memory options:

— 16K or 32Kbyte Flash EEPROM (erasable in 512-byte sectors) 64K, 96K, or 128Kbyte Flash EEPROM (erasable in 1024-byte sectors)

— 1K, 2K or 4K Byte RAM

• Analog-to-digital converters:

— One 8-channel module with 10-bit resolution

— External conversion trigger capability

• Available on MC9S12C Family:

— One 1M bit per second, CAN 2.0 A, B software compatible module

— Five receive and three transmit buffers

— Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit, or 8 x 8 bit

— Four separate interrupt channels for Rx, Tx, error, and wake-up

— Low-pass filter wake-up function

— Loop-back for self test operation

• Timer module (TIM):

— 8-channel timer

— Each channel configurable as either input capture or output compare

— Simple PWM mode

— Modulo reset of timer counter

— 16-bit pulse accumulator

— External event counting

— Gated time accumulation

• PWM module:

— Programmable period and duty cycle

— 8-bit 6-channel or 16-bit 3-channel

— Separate control for each pulse width and duty cycle

— Center-aligned or left-aligned outputs

— Programmable clock select logic with a wide range of frequencies

— Fast emergency shutdown input

• Serial interfaces:

— One asynchronous serial communications interface (SCI)

— One synchronous serial peripheral interface (SPI)

• CRG (clock reset generator module)

— Windowed COP watchdog

— Real time interrupt

— Clock monitor

— Pierce or low current Colpitts oscillator

— Phase-locked loop clock frequency multiplier

— Limp home mode in absence of external clock

— Low power 0.5MHz to 16MHz crystal oscillator reference clock

• Operating frequency:

— 32MHz equivalent to 16MHz bus speed for single chip

— 32MHz equivalent to 16MHz bus speed in expanded bus modes

— Option of 9S12C Family: 50MHz equivalent to 25MHz bus speed

— All 9S12GC Family members allow a 50MHz operating frequency.

• Internal 2.5V regulator:

— Supports an input voltage range from 2.97V to 5.5V

— Low power mode capability

— Includes low voltage reset (LVR) circuitry

— Includes low voltage interrupt (LVI) circuitry

• 48-pin LQFP, 52-pin LQFP, or 80-pin QFP package:

— Up to 58 I/O lines with 5V input and drive capability (80-pin package)

— Up to 2 dedicated 5V input only lines (IRQ, XIRQ)

— 5V 8 A/D converter inputs and 5V I/O

• Development support:

— Single-wire background debug™ mode (BDM)

— On-chip hardware breakpoints

— Enhanced DBG12 debug features


Other data sheets within the file:

Datasheet

MC9S12C32MFAE25 Datasheet

MC9S12C32MFAE25 Datasheet

MC9S12C32 Fact Sheet

MC9S12C32 Fact Sheet

MC9S12C32 Prod Brief

MC9S12C32 Prod Brief

Environmental Information

NXP RoHS3 Cert

NXP RoHS3 Cert

PCN Design/Specification

Copper Wirebond Material 28/May/2014

Copper Wirebond Material 28/May/2014

Mold Compound Chg 21/Dec/2015

Mold Compound Chg 21/Dec/2015

Application Notes

Audio Reproduction on HCS12 Microcontrollers

Audio Reproduction on HCS12 Microcontrollers

Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers

Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers

Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers

Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers

Noise Reduction Techniques for Microcontroller-Based Systems

Noise Reduction Techniques for Microcontroller-Based Systems

System Design and Layout Techniques for Noise Reduction in MCU-Based Systems

System Design and Layout Techniques for Noise Reduction in MCU-Based Systems

Transporting M68HC11 Code to M68HC12 Devices

Transporting M68HC11 Code to M68HC12 Devices

Using M68HC12 Indexed Indirect Addressing

Using M68HC12 Indexed Indirect Addressing

Using the Callable Routines in D-Bug12

Using the Callable Routines in D-Bug12

Images

Functional Block Diagram - Large

Functional Block Diagram - Large

Technical Resources

Cyclone PRO User Manual

Cyclone PRO User Manual

Executable to set up software files for AN2221

Executable to set up software files for AN2221

S12CPUV2 Reference Manual

S12CPUV2 Reference Manual

Software Files for AN2204

Software Files for AN2204

Software Files for AN2304

Software Files for AN2304

Software Files for AN2617

Software Files for AN2617

Software Files for AN2720/D

Software Files for AN2720/D

Software files for application note AN2250. Part 1 of 3 part set

Software files for application note AN2250. Part 1 of 3 part set

Software files for application note AN2250. Part 2 of 3 part set

Software files for application note AN2250. Part 2 of 3 part set

Software files for application note AN2250. Part 3 of 3 part set

Software files for application note AN2250. Part 3 of 3 part set

Source code for us with AN2318/D

Source code for us with AN2318/D

Use of OSC2/XTAL as a Clock Output on Motorola Microcontrollers

Use of OSC2/XTAL as a Clock Output on Motorola Microcontrollers

Test/Quality Data

Material Composition

Material Composition

RoHS Certificate of Analysis

RoHS Certificate of Analysis

Statement on EU REACH Provisions

Statement on EU REACH Provisions

 

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