Product Overview
Product Category: | Embedded - Microcontrollers |
Kynix Part #: | KY32-MC9S08DV16ACLC |
Manufacturer Part#: | MC9S08DV16ACLC |
Manufacturer | NXP USA Inc. |
Description: | IC MCU 8BIT 16KB FLASH 32LQFP |
Package: | 32-LQFP |
Datasheet: | |
Stock: | Yes |
Quantity: | 2310 PCS |
MC9S08DV16ACLC Images are for reference only:
Product Specifications
Categories | Integrated Circuits (ICs) Embedded - Microcontrollers |
Series | S08 |
Speed | 40MHz |
ADC Resolution | 12 bit |
Base Part Number | MC9S08DV16 |
Brand | NXP / Freescale |
Core Processor | S08 |
Core Architecture | S08 |
Core Size | 8-Bit |
Connectivity | CANbus, I²C, LINbus, SCI, SPI |
Peripherals | LVD, POR, PWM, WDT |
Data Converters | A/D 10x12b |
Data Bus Width | 8 bit |
Data RAM Size | 1024 B |
Data RAM Type | RAM |
EEPROM Size | - |
Halogen Free | Halogen Free |
Height | 1.4 mm |
Length | 7 mm |
Width | 7 mm |
Lead Finish | Matte Tin |
Max Processing Temp | 260 |
Maximum Clock Frequency | 40 MHz |
Mounting | Surface Mount |
Number of I/O | 25 |
Number of Programmable I/O | 26 |
Number of Timers/Counters | 2 |
Number of Pins | 32 |
Number of ADC Channels | 10 Channel |
Oscillator Type | External |
Operating Temperature | -40°C ~ 85°C (TA) |
Pin Count | 32 |
Product Dimensions | 7 x 7 x 1.45 mm |
Packaging | Tray |
Part Status | Active |
Program Memory Size | 16KB (16K x 8) |
Program Memory Type | FLASH |
Package / Case | 32-LQFP |
Product | MCU |
Product Category | 8-bit Microcontrollers - MCU |
Processor Series | MC9S08DV16 |
Product Type | 8-bit Microcontrollers - MCU |
Subcategory | Microcontrollers - MCU |
Supplier Device Package | s32-LQFP (7x7) |
RAM Size | 1K x 8 |
REACH SVHC | No SVHC |
Radiation Hardening | No |
Unit Weight | 0.006653 oz |
Voltage - Supply (Vcc/Vdd) | 2.7V ~ 5.5V |
Watchdog Timers | Watchdog Timer |
Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
MC9S08DV16ACLC Datasheet PDF Download:
Pinouts
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Description
The S08D family offers designers scalability and flexibility of migration with pin, peripheral and tool compatibility between S08D family devices. This highly integrated next generation family of MCUs is packed with features designed to provide increased performance, as well as save power, development time, board space and cost.
Features
S08 CPU
l 40 MHz core speed, 20 MHz bus speed on S08 CPU
l HC08 instruction set with added BGND instruction
On-Chip Memory
lUp to 128 KB flash read/program/erase over full operating voltage and temperature
lUp to 2 KB EEPROM in-circuit programmable memory; 8-byte single-page or 4-byte dualpage erase sector; program and erase while executing flash; erase abort
lUp to 8 KB RAM (16:1 flash/RAM, ratio better than competition)
Power Saving Modes
lTwo very low-power stop modes
lVery low-power, real-time interrupt for use in run, wait and stop modes
Clock Source Options
lOscillator (XOSC)—Loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz–38.4 kHz or 1 MHz–16 MHz
lMulti-purpose clock generator (MCG)–PLL and FLL modes; internal reference clock with trim adjustment; external reference with oscillator/resonator options
System Protection
lWatchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source or bus clock
lLow-voltage detection with reset or interrupt; selectable trip points
lIllegal opcode detection with reset
lIllegal address detection with reset
lFlash block protect
lEEPROM block protect
Peripherals
lACMPx—Analog comparators with selectable interrupt on rising, falling or either edge of comparator output; compare option to fixed internal bandgap reference voltage
lMSCAN—CAN protocol—Version 2.0 A, B; standard and extended data frames; support for remote frames; five receive buffers with FIFO storage scheme; flexible identifier acceptance filters programmable as: 2 x 32-bit, 4 x 16-bit, or 8 x 8-bit
lSCIx—SCI(s) with LIN 2.0 Protocol and SAE J2602 compliance; master extended break generation; slave extended break detection; LIN slave supplement on SCI1; automatic baud rate correction; message time-out detection
lSPI—Full-duplex or single-wire bi-directional; double-buffered transmit and receive; master or slave mode; MSB-first or LSB-first shifting
lI2C—Up to 100 kbps with maximum bus loading; multi-master operation; programmable slave address; interrupt-driven, byte-by-byte data transfer; broadcast mode enabled
lTPMx—One 6-channel (TMP1) and one 2-channel (TPM2); selectable input capture, output compare or buffered edge-aligned PWM on each channel
lRTC (Real-time counter)—8-bit modulus counter with binary or decimal-based prescaler; external clock source for precise time base, time-of-day calendar or task scheduling functions; free running, on-chip, low-power oscilator (1 kHz) for cyclic wake-up without external components
Development Support
lSingle-wire background debug (BDM) interface
lOn-chip, in-circuit emulation (ICE) with real-time bus capture
Input/Output
l87 general-purpose I/O pins and one input-only pin
l32 interrupt pins with selectable polarity on each pin
lHysteresis and configurable pull-up device on all input pins
lConfigurable slew rate and device strength on all output pins
Package Options
l100 LQFP 14 x 14 mm
l64-pin low-profile quad flat pack (LQFP)—10 x 10 mm
l48-pin LQFP—7 x 7 mm
l32-pin LQFP—7 x 7 mm
Miscellaneous
lEMC performance
lWide operating voltage range: 2.7V–5.5V
Background Debugging System
lOn-chip BDM
Package
lPin-compatible with SH, QG family
Other data sheets within the file:
Datasheet | |
MC9S08DV60,48,32,16 |  |
Application Notes | |
Designing for Electromagnetic Compatibility (EMC) with HCMOS Microcontrollers |  |
Designing for Electromagnetic Compatibility with Single-Chip Microcontrollers |  |
Hamming Error Control Coding Techniques with the HC08 MCU |  |
High Voltage Medium Power Board for Three Phase Motors |  |
Optical Character Recognition Using Fuzzy Logic |  |
Pulse Generation and Detection with Microcontroller Units |  |
Resetting Microcontrollers During Power Transitions |  |
System Design and Layout Techniques for Noise Reduction in MCU-Based Systems |  |
VPW J1850 Multiplexing Controller (BDLC) Module |  |
Recommended Documentation | |
MC9S08DZ48, MC9S08DZ32, MC9S08DZ16 - Data Sheet (REV 4) |  |
S08 D-Family Fact Sheet (REV 4) |  |
PCN | |
Customer Information Notification |  |
Device Specification / Errata |  |
PRODUCT AND PROCESS CHANGE NOTIFICATION |  |
S08DZ60 (32ld) S08DZ128 (48ld) Copper Wire Qualification |  |
Errata | |
MSE9S08DZ60_2M74K, Mask Set Errata for Mask 2M74K - Errata (REV 0) |  |
Mask Set Errata: 1M74K - Errata (REV 1) |  |
Mask Set Errata: 2M78G - Errata (REV 1) |  |
Mask Set Errata: 3M05C - Errata (REV 1) |  |
Mask Set Errata: 1M78G - Errata (REV 0) |  |
Mask Set Errata: 0M74K - Errata (REV 0) |  |
Test/Quality Data | |
Material Composition |  |
RoHS Certificate of Analysis |  |
Statement on EU REACH Provisions |  |
Users Guide | |
S08 Peripheral Module Quick Reference A Compilation of Demonstration Software for S08 Modules - User’s Guide (REV 1) |  |
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