Product Overview
Product Category: | Embedded - Microcontrollers |
Kynix Part #: | KY32-MC56F8335MFGE |
Manufacturer Part#: | MC56F8335MFGE |
Manufacturer | Freescale Semiconductor - NXP |
Description: | IC MCU 16BIT 64KB FLASH 128LQFP |
Package: | 128-LQFP |
Datasheet: | |
Stock: | Yes |
Quantity: | 70 PCS |
MC56F8335MFGE Images are for reference only:
Product Specifications
Manufacturer | NXP |
Manufacturer Part Number | MC56F8335MFGE |
Product Category | Digital Signal Processors & Controllers - DSP, DSC |
Mounting Style | SMD/SMT |
Package / Case | QFP-128 |
Product | DSCs |
Core | 56800E |
Maximum Clock Frequency | 60 MHz |
Program Memory Size | 64 kB |
Data RAM Size | 12 kB |
Typical Operating Supply Voltage (V) | 3.3 |
Minimum Operating Supply Voltage (V) | 3|2.25 |
Maximum Operating Supply Voltage | 3.6|2.75 |
Minimum Operating Temperature | - 40 C |
Maximum Operating Temperature | + 125 C |
Packaging | Tray |
Height | 1.4 mm |
Length | 20 mm |
Program Memory Type | Flash |
Width | 14 mm |
Brand | NXP Semiconductors |
Data ROM Size | 8 kB |
Interface Type | CAN, SCI, SPI |
Number of I/Os | 49 I/O |
ADC Resolution | 12 bit |
Data Bus Width | 16 bit |
External Data Bus Width | 4 |
Moisture Sensitive | Yes |
Number of Timers/Counters | 4 Timer |
Subcategory | Embedded Processors & Controllers |
Part # Aliases | 935323954557 |
Unit Weight | 0.032983 oz |
EU RoHS | Compliant |
China RoHS Compliant | YES |
ECCN (US) | 3A991.a.2 |
Part Status | Active |
Family Name | MC56F83xx |
Instruction Set Architecture | CISC |
Programmability | Yes |
PWM | 1 |
Number of ADCs | Quad |
ADC Channels | 4/4/4/4 |
USART | 0 |
UART | 0 |
USB | 0 |
SPI | 2 |
I2C | 0 |
I2S | 0 |
CAN | 1 |
Ethernet | 0 |
Watchdog | 1 |
Special Features | CAN Controller |
Supplier Temperature Grade | Automotive |
Pin Count | 128 |
PCB changed | 128 |
Lead Shape | Gull-wing |
Risk Rank | 5.13 |
JESD-609 Code | e3 |
Peak Reflow Temperature (Cel) | 260 |
ROM (words) | 65536 |
Surface Mount | YES |
Additional Feature | ALSO REQUIRES 3.3V SUPPLY |
Boundary Scan | YES |
Format | FIXED POINT |
Technology | CMOS |
Terminal Pitch | 0.5 mm |
uPs/uCs/Peripheral ICs Type | DIGITAL SIGNAL PROCESSOR, OTHER |
Internal Bus Architecture | MULTIPLE |
Low Power Mode | YES |
Package Shape | RECTANGULAR |
Qualification Status | Not Qualified |
Barrel Shifter | YES |
JESD-30 Code | R-PQFP-G128 |
Moisture Sensitivity Level | 3 |
Package Body Material | PLASTIC/EPOXY |
Package Style | FLATPACK, LOW PROFILE, FINE PITCH |
RAM (bytes) | 12288 |
Terminal Finish | Matte Tin (Sn) |
Status | Transferred |
MC56F8335MFGE Datasheet PDF Download:
Pinouts
Figure 1. 56F8335 Signals Identified by Functional Group1 (128-Pin LQFP)
Block Diagram
Figure 2. 56F833556F8135 Block Diagram - 128 LQFP
Description
NXP Semiconductors MC56F8x 16-bit Digital Signal Controllers (DSC) combine the processing power of a Digital Signal Processor (DSP) and the functionality of a Microcontroller (MCU) with fast and powerful peripherals. The MC56F8x DSCs are based on the 16-bit 56800E DSC core, with performance up to 60MIPS. These devices are ideal for digital power conversion applications, such as board-mounted digital power supplies for servers, industrial and telecom power supplies, and advanced motor control.
The 56800E core is based on a dual Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The MCU-style programming model and optimized instruction set allow straightforward generation of efficient, compact DSP and control code. The instruction set is also highly efficient for C compilers to enable rapid development of optimized control applications.
Features
• Efficient 16-bit 56800E family controller engine with dual Harvard architecture
• Up to 60 Million Instructions Per Second (MIPS) at 60MHz core frequency
• Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC)
• Four 36-bit accumulators, including extension bits
• Arithmetic and logic multi-bit shifter
• Parallel instruction set with unique DSP addressing modes
• Hardware DO and REP loops
• Three internal address buses
• Four internal data buses
• Instruction set supports both DSP and controller functions
• Controller-style addressing modes and instructions for compact code
• Efficient C compiler and local variable support
• Software subroutine and interrupt stack with depth limited only by memory
• JTAG/EOnCE debug programming interface
- Package options
- 28-pin SOIC
- 32, 44, 48, 64, 128, 144, and 160-pin LQFP
Other data sheets within the file:
Datasheet | |
56F8335 / 56F8135 Technical Data - Data Sheet |
|
56F8335 - Fact Sheet |
|
56F8335 / 56F8135 Technical Data - Data Sheet |
|
56F8335 Digital Signal Controller: Preliminary Chip Errata - Errata |
|
56F83xx SCI/CAN Bootloader User Manual |
|
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