Home  Embedded - DSP (Digital Signal Processors)

Aug 28 2019

ADSP-21065LKSZ-264 Datasheet PDF – IC DSP CONTROLL 544KBIT 208-MQFP Analog Devices Inc.

Product Overview

Product Category:

Embedded - DSP (Digital Signal Processors)

Kynix Part #:

KY32- ADSP-21065LKSZ-264

Manufacturer Part#:

ADSP-21065LKSZ-264

Manufacturer

Analog Devices Inc.

Description:

IC DSP CONTROLL 544KBIT 208-MQFP

Package:

QFP

Datasheet:

ADSP-21065LKSZ-264-100 Datasheet

Stock:

Yes

Quantity:

992 PCS


ADSP-21065LKSZ-264 Images are for reference only:

ADSP-21065LKSZ-264

 


Product Specifications

Product Category

Embedded - DSP (Digital Signal Processors)

Manufacturer

Analog Devices Inc.

Series

SHARC®

Status

Active

Packaging

Tray

Package/Case

208-BFQFP

Architecture

Enhanced Harvard

Address Bus Width

24.0

Bit Size

32

Barrel Shifter

Yes

Boundary Scan

Yes

Clock Rate

60 MHz

Core Architecture

SHARC

Clock Frequency-Max

33.33 MHz

China RoHS Compliant

Yes

Data Bus Width

32 bit

Data RAM Size

544 kbit

Device Core Size

32 b

Device Input Clock Speed

66 MHz

ECCN (US)

3A991.a.2

Ethernet

0

EU RoHS Compliant

Yes

External Data Bus Width

32.0

Format

FLOATING POINT

Frequency

66 MHz

Family Name

ADSP-2116x

HTS

8542.31.00.01

Interface

Host Interface, Serial Port

Interface Type

Serial

Internal Bus Architecture

MULTIPLE

Instruction Type

Floating Point

Instruction Set Architecture

Enhanced Harvard

JESD-30 Code

S-PQFP-G208

JESD-609 Code

e3

Lead Shape

Gull-wing

Low Power Mode

No

MIPS

66

MFLOPS

198 MFLOPS

Mounting Type

Surface Mount

Mounting Style

SMD/SMT

Moisture Sensitivity Level

3

Maximum Clock Frequency

Maximum Clock Frequency

Non-Volatile Memory

External

Number of Pins

208

Number of Cores

1

Number of Terminals

208

Number of Timers/Counters

2

Numeric and Arithmetic Format

Floating-Point

On-Chip RAM

64 kB

Operating Temperature-Min

0.0 °C

Operating Temperature-Max

85.0 °C

Pin Count

208

Package Body Material

PLASTIC/EPOXY

Package Code

FQFP

Package Equivalence Code

QFP208,1.2SQ,20

Package Shape

SQUARE

Package Style

FLATPACK, FINE PITCH

Package Height

3.4 (Max)

Package Length

28

Package Width

28

PCB changed

208

Product Type

DSP - Digital Signal Processors & Controllers

Peak Reflow Temperature

260 °C

Power Supplies

3.3

Program Memory Type

ROMLess

Programmability

No

RAM Size

68 KB

RAM (words)

17408

Rad Hardened

No

Seated Height-Max

4.1 mm

Sub Category

Digital Signal Processors

Supplier Package

MQFP

Supply Voltage-Nom

3.3 V

Supply Voltage-Min

3.13 V

Supply Voltage-Max

3.6 V

Surface Mount

Yes

Standard Package Name

QFP

Supplier Device Package

208-MQFP (28x28)

Technology

CMOS

Terminal Form

GULL WING

Terminal Pitch

0.5 mm

Terminal Position

QUAD

Temperature Grade

OTHER

Typical Operating Supply Voltage (V)

3.3

Time@Peak Reflow Temperature-Max

40 s

Unit Weight

0.200935 oz

Voltage - I/O

3.30 V

Voltage - Core

3.30 V

Length

28.0 mm

Width

28.0 mm

SPI

1

I2S

0

I2C

0

CAN

0

USB

0

UART

0

USART

0


ADSP-21065LKSZ-264 Datasheet PDF Download: 

ADSP-21065LKSZ-264 Datasheet PDF

Block Diagram

Figure 1. Functional Block Diagram

Figure 1. Functional Block Diagram

System

Figure 2. ADSP-21065L Single-Processor System

Figure 2. ADSP-21065L Single-Processor System

Figure 3. Multiprocessing System

Figure 3. Multiprocessing System

Pin

Figure 4.208-LEAD MQFP PIN 

Figure 4. 208-LEAD MQFP PIN


Description

The ADSP-21065L is a powerful member of the SHARC family of 32-bit processors optimized for cost sensitive applications. The SHARC—Super Harvard Architecture—offers the highest levels of performance and memory integration of any 32-bit DSP in the industry — they are also the only DSP in the industry that offer both fixed and floating-point capabilities, without compromising precision or performance.

The ADSP-21065L is fabricated in a high speed, low power CMOS process, 0.35 mm technology. With its on-chip instruction cache, the processor can execute every instruction in a single cycle. Table I lists the performance benchmarks for the ADSP-21065L.

The ADSP-21065L SHARC combines a floating-point DSP core with integrated, on-chip system features, including a 544 Kbit SRAM memory, host processor interface, DMA controller, SDRAM controller, and enhanced serial ports.

Features

• 66 MIPS, 198 MFLOPS Peak, 132 MFLOPS Sustained Performance

• User-Configurable 544 Kbits On-Chip SRAM Memory 

• Two External Port, DMA Channels and Eight Serial Port, DMA Channels

• SDRAM Controller for Glueless Interface to Low Cost External Memory (@ 66 MHz)

• 64M Words External Address Range

• 12 Programmable I/O Pins and Two Timers with Event Capture Options

• Code-Compatible with ADSP-2106x Family

• 208-Lead MQFP or 196-Ball Mini-BGA Package

• 3.3 Volt Operation

• Flexible Data Formats and 40-Bit Extended Precision

— 32-Bit Single-Precision and 40-Bit Extended-Precision IEEE Floating-Point Data Formats

— 32-Bit Fixed-Point Data Format, Integer and Fractional, with Dual 80-Bit Accumulators

• Parallel Computations

— Single-Cycle Multiply and ALU Operations in Parallel with Dual Memory Read/Writes and Instruction Fetch

— Multiply with Add and Subtract for Accelerated FFT Butterfly Computation

— 1024-Point Complex FFT Benchmark: 0.274 ms (18,221 Cycles)


Other data sheets within the file:

Datasheet

ADSP-21161NKCA-100 Datasheet

ADSP-21161NKCA-100 Datasheet


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