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Nov 16 2019

ADSP-21061KS-200 Datasheet PDF – IC DSP CONTROLLER 32BIT 240MQFP AD

Product Overview

Product Category:

Embedded - DSP (Digital Signal Processors)

Kynix Part #:

KY32- ADSP-21061KS-200

Manufacturer Part#:

ADSP-21061KS-200

Manufacturer

AD

Description:

IC DSP CONTROLLER 32BIT 240MQFP

Package:

QFP240

Datasheet:

ADSP-21061KS-200 Datasheet

Stock:

Yes

Quantity:

98 PCS


ADSP-21061KS-200 Images are for reference only:

ADSP-21061KS-200

 


Product Specifications

Product Category

Embedded - DSP (Digital Signal Processors)

Manufacturer

AD

Series

SHARC®

Packaging

Tray

Package/Case

240-BFQFP Exposed Pad

Address Bus Width

32.0

Bit Size

32

Barrel Shifter

Yes

Boundary Scan

Yes

Clock Rate

50 MHz

Core Architecture

SHARC

Clock Frequency-Max

50.0 MHz

Data Bus Width

32 bit

Data RAM Size

256 kB

ECCN (US)

3A991.a.2

External Data Bus Width

48.0

Format

FLOATING POINT

Frequency

50 MHz

Interface

Synchronous Serial Port (SSP), Serial

Interface Type

Serial

Internal Bus Architecture

MULTIPLE

Instruction Type

Floating Point

JESD-30 Code

S-PQFP-G240

JESD-609 Code

e0

Low Power Mode

No

MFLOPS

120 MFLOPS

Mounting Type

Surface Mount

Mounting Style

SMD/SMT

Moisture Sensitivity Level

3

Maximum Clock Frequency

50 MHz

Number of Pins

240

Number of Cores

1

Number of Terminals

240

Number of Timers/Counters

1

Non-Volatile Memory

External

On-Chip RAM

128 kB

Operating Temperature-Min

0.0 °C

Operating Temperature-Max

85.0°C

Package Body Material

PLASTIC/EPOXY

Package Code

HFQFP

Package Equivalence Code

HQFP240,1.37SQ,20

Package Shape

SQUARE

Package Style

FLATPACK, HEAT SINK/SLUG, FINE PITCH

Product Type

DSP - Digital Signal Processors & Controllers

Peak Reflow Temperature

225 °C

Power Supplies

5

Program Memory Size

768 kB

RAM Size

128 KB

RAM (words)

32768

Seated Height-Max

4.1 mm

Sub Category

Digital Signal Processors

Supply Current-Max

850.0 mA

Supply Voltage-Nom

5.0 V

Supply Voltage-Min

4.75 V

Supply Voltage-Max

5.25 V

Surface Mount

Yes

Supplier Device Package

240-MQFP-EP (32x32)

Technology

CMOS

Terminal Form

GULL WING

Terminal Pitch

0.5 mm

Terminal Finish

Tin/Lead (Sn85Pb15)

Terminal Position

QUAD

Temperature Grade

COMMERCIAL EXTENDED

Time@Peak Reflow Temperature-Max

30 s

Unit Weight

0.259260 oz

Voltage - I/O

5.00 V

Voltage - Core

3.00 V

Length

32.0 mm

Width

32.0 mm


ADSP-21061KS-200 Datasheet PDF Download: 

 ADSP-21061KS-200 Datasheet PDF

Functional Block Diagram

Figure 1. Functional Block Diagram 

Figure 1. Functional Block Diagram

Memory Map

Figure 2. Memory Map

Figure 2. Memory Map

Description

The ADSP-21061 SHARC—Super Harvard Architecture Computer—is a signal processing microcomputer that offers new capabilities and levels of performance. The ADSP-21061

SHARC is a 32-bit processor optimized for high performance DSP applications. The ADSP-21061 builds on the ADSP-21000 DSP core to form a complete system-on-a-chip, adding a dualported on-chip SRAM and integrated I/O peripherals supported by a dedicated I/O bus.

Fabricated in a high speed, low power CMOS process, the ADSP-21061 has a 20 ns instruction cycle time and operates at 50 MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle.

The ADSP-21061 SHARC represents a new standard of integration for signal computers, combining a high performance floating-point DSP core with integrated, on-chip system features including 1M bit SRAM memory, a host processor interface, a DMA controller, serial ports, and parallel bus connectivity for glueless DSP multiprocessing.

Features

• 50 MIPS, 20 ns instruction rate, single-cycle instruction execution

• 120 MFLOPS peak, 80 MFLOPS sustained performance 

• Dual data address generators with modulo and bit-reverse addressing

• Efficient program sequencing with zero-overhead looping: single-cycle loop setup

• IEEE JTAG Standard 1149.1 test access port and on-chip emulation

• 32-bit single-precision and 40-bit extended-precision IEEE floating-point data formats or 32-bit fixed-point data format

• 240-lead MQFP package, thermally enhanced MQFP, 225-ball plastic ball grid array (PBGA)

• Lead (Pb) free packages.


Other data sheets within the file:

Datasheet

ADSP-21061KS-200 Datasheet

ADSP-21061KS-200 Datasheet


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